Final Program: Workshop on the Future of Spintronics
1:30-4:30pm, June 5, 2016
Room 8ABC, Austin Convention Center
As Moore’s law approaches its limits, spintronics provides a promising alternative for circuit design. There have been active efforts in the recent past in exploring direct replacements for CMOS, augmentations to CMOS technologies to build heterogeneous systems, and platforms for alternative computational models. Spintronic technologies offer great promise on all these fronts, with structures that enable logic computations, memory platforms that are dense and nonvolatile, and substrates for neural computation. The purpose of this workshop is to provide industrial and academic perspectives on the evolution of spintronics-based circuits for Boolean, non-Boolean, and memory applications.
Please click on the title of the presentation to view the slides.
1:30 PM |
Welcome – Ken Hansen, CEO, Semiconductor Research Corporation Introduction – J.-P. Wang, University of Minnesota, C-SPIN Director |
1:50 PM |
Resilient STT-MRAM based main memory – Pradip Bose, IBM |
2:05 PM |
Neural computing with magnet-metallic neurons and synapses: Prospects and perspectives Kaushik Roy, Purdue University |
2:20 PM |
MTJ based random number generation and analog-to-digital conversion Chris H. Kim, University of Minnesota |
2:35 PM |
Stochastic computing with spintronics Anand Raghunathan, Purdue University |
3:00 PM |
Break |
3:30 PM |
Enabling spintronics via Shannon-inspired statistical information processing Naresh Shanbhag, University of Illinois |
3:45 PM |
Emerging spintronics-based logic technologies Sachin S. Sapatnekar, University of Minnesota |
4:00 PM |
Hybrid CMOS + spintronics for the next big leap in energy-efficient computing Vivek De, Intel |
4:15 PM |
Benchmarking spintronic technologies for Boolean and non-Boolean circuit applications Chenyun Pan and Azad Naeemi, Georgia Tech |
4:30 PM |
Closing Remarks |
Organizers: Kaushik Roy (Purdue University) and Sachin S. Sapatnekar (University of Minnesota) on behalf of C-SPIN, an SRC STARnet Center sponsored by MARCO and DARPA.
