Theme 4: Spintronic Devices and Interconnects

of information flow. Link to related publication.
Theme 4 aims to develop novel memory, logic and communication device solutions necessary to realize a complete spintronic computational system.
The PIs are addressing the main challenges to realizing a functional spin-based computational system, including developing scalable, low-power memories, robust logic devices, and low-power transduction mechanisms for spin-communication. The theme also aims to establish a predictive modeling infrastructure that will allow circuit-level analysis of the system performance.
Further information on the theme PIs can be found on the list at right.